The Hagen-chip represents the second generation of mixed-mode analog neural networks developed in Heidelberg. Like its predecessor EvoOpt it is optimized for fast chip-in-the-loop evolutionary algorithms, but it has also been used with off-line learning methods for an image processing application. An overview of the Hagen system is shown below.
At the heart of the system is the Hagen board containing all the necessary circuitry to train and use the Hagen network ASIC. Inside each chip, four analog Perceptron-based networks process the information. Their communication with each other as well as with other parts of the system is entirely digital. Each network block can implement a fully connected recursive network with 128 input and 64 output neurons. The weight values are stored on capacitances inside the synapses. A specialized weigth storage circuit is able to load up to 400 million weight values per second. The neuron operation is based on the summation of currents generated in the synapses. If the excitatory exceeds the inhibitory current, the synapse will fire. This differential neuron input leads to high noise immunity and fast operation.
A single network block, containing more than 8000 synapses, uses only 1.5 mm2 silicon area. The high speed interface is realized by bidirectional low-voltage differential signalling (LVDS). This allows a high throughput without the generation of digital switching noise. 16 integrated digital-to-analog converters translate the numerical weight values into the according strengths of the synaptic connections. These numerical weight values are generated by an evolutionary training algorithm executed inside the FPGA on each network board. Therefore the training capacity scales with the system.