Circuits and methods for VLSI design: Weekly seminar of the Heidelberg ASIC-Laboratory

We meet in the Seminarbox I (01.107) at the first floor at 16:00 s.t.

Talks

12. May 2021
26. May 2021
4:00 pm ASIC: Xilinx AI Matrix Nodes... Dr. Joscha Ilmberger

Previous talks

12.05.2021

05.05.2021

21.04.2021

  • ISSCC 21: in-memory computing - two paper presentations - part 2

14.04.2021

07.04.2021

  • Bayesian logic in neuron refractory states - Johannes Weis

20.01.2021

  • Keyence Digital Microscope VHX-7000 presentation - Patricia Mohr

16.12.2020

  • A Short (Post) Submission Readiness Review "KLauS6b" - Dr. Konrad Briggl

02.12.2020

  • Thoughts on conductance-based synaptic input circuits - Sebastian Billaudelle

25.11.2020

  • Final Review: Frankensteinboard - Dr. Maurice Güttler

04.11.2020

  • HICANN-X: Large macro block timing characterization, first experiences - Dr. Andreas Grübl (Slides)

28.10.2020

21.10.2020

  • HICANN-X: Results from testing - the RTL-view part I

30.09.2020

  • ASICs for Photon Detection integrating Avalanche Diodes and CMOS Readout - Dr. Peter Fischer (Slides)

23.09.2020

  • Final design issues for the BSS-2 mockup-wafer: Project Frankenstein - Dr. Maurice GÃŒttler

16.09.2020

  • Run2020: Overview of the latest submissions - Benjamin WeinlÀder (Slides)

19.08.2020

  • EXTOLL News - Tobias Thommes (Slides)

12.08.2020

  • Updates on the KLauS6 chip - Dr. Wei Shen (Slides)

22.07.2020

  • FPGA design for future HAGEN-mode operation of HICANN-X - Joscha Ilmberger (Slides)

16.07.2020

  • Review of first version of new HICANN-X board for single chip platform - Dan Husmann

24.06.2020

  • BrainScaleS EXTOLL - A Progress Overview - Tobias Thommes (Slides)

03.06.2020

  • Lowest-Energy operation of the HICANN-X ASIC: Testboard development Part IV - Dr. Maurice Guettler, Dan Husmann, Joscha Ilmberger

13.05.2020

  • Lowest-Energy operation of the HICANN-X ASIC: Testboard development Part III - Dr. Maurice Guettler, Dan Husmann, Joscha Ilmberger

06.05.2020

  • Lowest-Energy operation of the HICANN-X ASIC: Testboard development Part II - Dr. Maurice Guettler, Dan Husmann, Joscha Ilmberger

29.04.2020

  • Lowest-Energy operation of the HICANN-X ASIC: Testboard development - Dr. Maurice Guettler, Dan Husmann, Joscha Ilmberger

22.04.2020

  • Low-Power Inference Setup for HICANN-X - Joscha Ilmberger (Slides)

15.04.2020

  • Wafer-Scale without Wafer : the BrainScaleS FrankenStein Wafer Project - Dr. Maurice Guettler (Slides)

19.02.2020

  • Tapeout Review Analog Design Changes HX2 - Sebastian Billaudelle (Slides)

08.01.2020

  • Hicann-X-L2comm over JTAG: Serializer-independent Interconnects - Vitali Karasenko (Slides)
 
up
talks
12. May 2021
26. May 2021
4:00 pm ASIC: Xilinx AI Matrix Nodes...Dr. Joscha Ilmberger
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