KIP publications

year 2022
author(s) Eric Müller, Sebastian Schmitt, Christian Mauch, Sebastian Billaudelle, Andreas Grübl, Maurice Güttler, Dan Husmann, Joscha Ilmberger, Sebastian Jeltsch, Jakob Kaiser, Johann Klähn, Mitja Kleider, Christoph Koke, José Montes, Paul Müller, Johannes Partzsch, Felix Passenberg, Hartmut Schmidt, Bernhard Vogginger, Jonas Weidner, Christian Mayr, Johannes Schemmel
title The Operating System of the Neuromorphic BrainScaleS-1 System
KIP-Nummer HD-KIP 20-32
KIP-Gruppe(n) F9
document type Paper
Keywords neuromorphic computing; neuroscientific modeling; hardware abstraction
source Neurocomputing (2022)
doi 10.1016/j.neucom.2022.05.081
Abstract (en)

BrainScaleS-1 is a wafer-scale mixed-signal accelerated neuromorphic system targeted for research in the fields of computational neuroscience and beyond-von-Neumann computing. Here we present the BrainScaleS Operating System (BrainScaleS OS): the software stack gives users the possibility to emulate networks described in the high-level network description language PyNN with minimal knowledge of the system, as well as expert usage facilitated by allowing access to the system at any depth of the stack. BrainScaleS OS has been used extensively in the commissioning and calibration of BrainScaleS-1 as well as in various neuromorphic experiments, e.g., rate-based deep learning, accelerated physical emulation of Bayesian inference, solving of SAT problems, and others. The tolerance to faults of individual components of the neuromorphic system is reflected in the mapping process based on information stored in an availability database. We evaluate the robustness and compensation mechanisms of the system and software stack. The software stack is designed with performance in mind, with its core implemented in C++ and most user-facing API wrapped automatically to Python. The implemented multi-FPGA orchestration allows for parallel configuration and synchronized experiments facilitating wafer-scale experiments. The initial configuration of a wafer-scale experiment with hundreds of neuromorphic ASICs is performed in a fraction of a minute. Subsequent experiments, that potentially change only a subset of parameters, can be executed with rates of typically 10Hz. The bandwidth from the host machine to the neuromorphic system is fully utilized starting from a quarter of the system’s FPGA count. Operation and development methodologies implemented for the BrainScaleS-1 neuromorphic architecture are presented and the individual components of BrainScaleS OS constituting the software stack for BrainScaleS-1 platform operation are detailed.

bibtex
@article{mueller2022operating,
  author   = {Müller E, Schmitt S, Mauch C, Schmidt H, Montes J, Ilmberger J, Klähn J, Passenberg F, Koke C, Kleider M, Jeltsch S, Güttler M, Husmann D, Billaudelle S, Müller P, Grübl A, Kaiser J, Weidner J, Vogginger B, Partzsch J, Mayr C, Schemmel J},
  title    = {The Operating System of the Neuromorphic BrainScaleS-1 System},
  journal  = {Neurocomputing},
  year     = {2022},
  volume   = {},
  pages    = {},
  month    = {may},
  note     = {in typesetting},
  doi      = {10.1016/j.neucom.2022.05.081},
  url      = {}
}
Datei pdf
URL arXiv pre-print
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