KIP-Veröffentlichungen

The Electronic Vision(s) Group at the Kirchho-Institute for Physics uses JTAG Test Access Ports in dierent parameterizations for the communication with the integrated circuits. For the control of these Test Access Ports, an equally parameterizable driver module was designed in SystemVerilog by a former group member. This driver module was only used with one specic conguration, since all other congurations had not yet been tested. The goal of this project was therefore to verify the correct functionality of the driver module for all permitted congurations. For the verication, a parameterizable test bench was designed. With the help of the test bench, dierent tests were carried out which revealed various malfunctions of the driver module. These malfunctions could be xed in the course of a comprehensive debugging process. The correct functionality of the driver module is now ensured for all possible congurations. It thus can be used for dierent projects such as the development of the HICANN-X chip.