The test pulse circuit

At the rising edge of a signal applied to the FcsTp pad, a charge equivalent to

• $\approx +$2 MIP$_{\rm Si}$ is injected into the inputs of the channels 1, 5, 9, 13 ...,
• $\approx +$1 MIP$_{\rm Si}$ into channels 2, 6, 10, 14 ...,
• $\approx -$1 MIP$_{\rm Si}$ into channels 3, 7, 11, 15 ...and
• $\approx -$2 MIP$_{\rm Si}$ into channels 4, 8, 12, 16 ....

with $+1 MIP_{\rm Si}$ being equivalent to a charge of 24.000 electrons.

Thus, with an appropriate trigger a stairway-like readout figure is generated . The polarity of the injected charge toggles after each application (i.e. -1 MIP$_{\rm Si}$ is injected into channels 1, 5, 9, 13 ...for an even number of test pulses).