Beetle - a readout chip for LHCb
 

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Beetle 1.1

Beetle 1.1 is an improved version of the first complete readout chip for the LHCb experiment (Beetle 1.0). Its main purpose is evaluation of the concept and enabling system tests. Hence, while featuring the basic fast readout mode for LHCb (pipeline latency of 160 clock cycles, 16 multi-event buffers, output of analogue data via 4 ports at 40MHz speed) some other features are not yet implemented, especially the logic is not yet robust against SEU.

Chip and pad layout of the Beetle 1.1

Layout of the Beetle 1.1 chip Padlayout of the Beetle 1.1 chip

Beetle 1.1 pad-description specifies all Beetle pads, positions and pad types.

Improvements of Beetle 1.1

  • Working tristate buffers enable read-back of setup registers
  • Improved biasing of pipeline readout amplifier
  • Fixed dummy transistors in transmission gates
  • Missing ground connections added
  • Correct Pipeline Column Number (PCN) levels
  • Binary readout now available
  • Analog delay circuit for I2C interface permitts programming independent from 40MHz clock
  • Testoutput of Pipeamp
  • New structure of pipeline (due to crosstalk)
   
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Letzte Änderung: 22 May 2002