Beetle - a readout chip for LHCb
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Content
BeetleBG 1.0
BeetleBG1.0 is the first prototype chip for the bias generators to be integrated into the Beetle chip. It integrates voltage and current D/A converter and a current source.
The pictures shows the layout of the chip.
Padlayout of the 2mm x 2mm chip.
Registermap
| no. | register |
|---|---|
| 0 | Ibuf 4 |
| 1 | Isha 4 |
| 2 | Ipre 4 (nmos) |
| 3 | Ibuf2 |
| 4 | Isha2 |
| 5 | Ipre2 (pmos) |
| 6 | Ibuf1 |
| 7 | Isha1 |
| 8 | Ipre1 (pmos) |
| 9 | Vfs |
| 10 | Vfp |
Letzte Änderung: 8 Feb 2002