Top side pads

A pad description for Helix128-2.0 and Helix128-2.1 is given in table 16 on page

, the description for Helix128-2.2 in table 17 on page

Table 16: Pads on the top side of Helix128-2.0/2.1. The first pad in the table corresponds to the uppermost pad of the chip's top side (with the frontside left).
Ref. no. Pin name Type Description

266,265 Gnda supply analog ground (0V)

264,263 Vssa supply negative analog supply voltage (-2V)

262,261 Vdda supply positive analog supply voltage (+2V)

260 TestOut output test channel preamplifier output

259 HelixTokenOut output token output; must be bonded to pad no. 256 ReturnTokenIn if the chip is the last in the daisy chain and for single chip operation (otherwise bonded to pad no. 179 HelixTokenIn of following chip in the daisy chain)

258 ReturnTokenIn input return path token input; must be bonded to pad no. 257 HelixTokenOut if the chip is the last in the daisy chain and for single chip operation (otherwise bonded to pad no. 180 ReturnTokenOut of following chip in the daisy chain)

257 SyncOut $\langle$ 0 $\rangle$ output synchronicity monitoring output to neighbouring Helix128-2.0/2.1

256 SyncOut $\langle$ 1 $\rangle$ output ``

255-253

252 SyncOut $\langle$ 5 $\rangle$ output ``

251 SufixBus $\langle$ 7 $\rangle$ test outp. bias generator data bus; used for verification of correct internal operation; no connection needed for normal operation

250 SufixBus $\langle$ 6 $\rangle$ test outp. ``

249-245

244 SufixBus $\langle$ 0 $\rangle$ test outp. ``

243 notSel $\langle$ 6 $\rangle$ test outp. select bus in bias generator; strobes access to the Idriver DAC; used for verification of correct internal operation; no connection needed for normal operation

242 notSel $\langle$ 5 $\rangle$ test outp. select bus in bias generator; strobes access to the Isf DAC; used for verification of correct internal operation; no connection needed for normal operation

241 notSel $\langle$ 4 $\rangle$ test outp. select bus in bias generator; strobes access to the Ipipe DAC; used for verification of correct internal operation; no connection needed for normal operation

**Table 16:** Pads on the top side of Helix128-2.0/2.1. The first pad in the table corresponds to the uppermost pad of the chip's top side (with the frontside left).
Ref. no.	Pin name	Type	Description
266,265	`Gnda`	supply	analog ground (0V)
264,263	`Vssa`	supply	negative analog supply voltage (-2V)
262,261	`Vdda`	supply	positive analog supply voltage (+2V)
260	`TestOut`	output	test channel preamplifier output
259	`HelixTokenOut`	output	token output; must be bonded to pad no. 256 `ReturnTokenIn` if the chip is the last in the daisy chain and for single chip operation (otherwise bonded to pad no. 179 `HelixTokenIn` of following chip in the daisy chain)
258	`ReturnTokenIn`	input	return path token input; must be bonded to pad no. 257 `HelixTokenOut` if the chip is the last in the daisy chain and for single chip operation (otherwise bonded to pad no. 180 `ReturnTokenOut` of following chip in the daisy chain)
257	`SyncOut` $\langle$ 0 $\rangle$	output	synchronicity monitoring output to neighbouring Helix128-2.0/2.1
256	`SyncOut` $\langle$ 1 $\rangle$	output	``
255-253
252	`SyncOut` $\langle$ 5 $\rangle$	output	``
251	`SufixBus` $\langle$ 7 $\rangle$	test outp.	bias generator data bus; used for verification of correct internal operation; no connection needed for normal operation
250	`SufixBus` $\langle$ 6 $\rangle$	test outp.	``
249-245
244	`SufixBus` $\langle$ 0 $\rangle$	test outp.	``
243	`notSel` $\langle$ 6 $\rangle$	test outp.	select bus in bias generator; strobes access to the Idriver DAC; used for verification of correct internal operation; no connection needed for normal operation
242	`notSel` $\langle$ 5 $\rangle$	test outp.	select bus in bias generator; strobes access to the Isf DAC; used for verification of correct internal operation; no connection needed for normal operation
241	`notSel` $\langle$ 4 $\rangle$	test outp.	select bus in bias generator; strobes access to the Ipipe DAC; used for verification of correct internal operation; no connection needed for normal operation

Table 17: Pads on the top side of Helix128-2.2/2.3. The first pad in the table corresponds to the uppermost pad of the chip's top side (with the frontside left).
Ref. no. Pin name Type Description

266,265 Gnda supply analog ground (0V)

264,263 Vssa supply negative analog supply voltage (-2V)

262,261 Vdda supply positive analog supply voltage (+2V)

260 TestOut output test channel preamplifier output

259c GndComp supply Reference voltage for comparators' AC coupling (0V)

259b VssComp supply Comparators' most negative supply (-2V)

259a VddComp supply Comparators' most positive supply (+2V)

259 notHelixTokenIn input Reserved for future use

258 notReturnTokenOut output Reserved for future use

257a ReturnTokenOut output to be connected to pad no. 180a ReturnTokenIn of predecessing Helix128-2.2/2.3 if the chip is nonleading in a daisy chain (not to be connected for single chip operation and if the chip is the first in a daisy chain)

257 SyncOut $\langle$ 0 $\rangle$ output synchronicity monitoring output to neighbouring Helix128-2.2./2.3

256 SyncOut $\langle$ 1 $\rangle$ output ``

255-253

252 SyncOut $\langle$ 5 $\rangle$ output ``

251 HelixTokenIn input to be connected to pad no. 187 HelixTokenOut of predecessing Helix128-2.2/2.3 if the chip is nonleading in a daisy chain (not to be connected for single chip operation and if the chip is the first in a daisy chain)

250 notFailsafeReturnTokenOut output Reserved for future use.

249 FailsafeReturnTokenOut output Reserved for future use.

248 FailsafeHelixTokenIn input Reserved for future use.

247 FailsafeHelixTokenOut output Reserved for future use.

246 SufixTokenOut output Output of token generator (see pad no. 267)

245-240a n. c. Removed

**Table 17:** Pads on the top side of Helix128-2.2/2.3. The first pad in the table corresponds to the uppermost pad of the chip's top side (with the frontside left).
Ref. no.	Pin name	Type	Description
266,265	`Gnda`	supply	analog ground (0V)
264,263	`Vssa`	supply	negative analog supply voltage (-2V)
262,261	`Vdda`	supply	positive analog supply voltage (+2V)
260	`TestOut`	output	test channel preamplifier output
259c	`GndComp`	supply	Reference voltage for comparators' AC coupling (0V)
259b	`VssComp`	supply	Comparators' most negative supply (-2V)
259a	`VddComp`	supply	Comparators' most positive supply (+2V)
259	`notHelixTokenIn`	input	Reserved for future use
258	`notReturnTokenOut`	output	Reserved for future use
257a	`ReturnTokenOut`	output	to be connected to pad no. 180a `ReturnTokenIn` of predecessing Helix128-2.2/2.3 if the chip is nonleading in a daisy chain (not to be connected for single chip operation and if the chip is the first in a daisy chain)
257	`SyncOut` $\langle$ 0 $\rangle$	output	synchronicity monitoring output to neighbouring Helix128-2.2./2.3
256	`SyncOut` $\langle$ 1 $\rangle$	output	``
255-253
252	`SyncOut` $\langle$ 5 $\rangle$	output	``
251	`HelixTokenIn`	input	to be connected to pad no. 187 `HelixTokenOut` of predecessing Helix128-2.2/2.3 if the chip is nonleading in a daisy chain (not to be connected for single chip operation and if the chip is the first in a daisy chain)
250	`notFailsafeReturnTokenOut`	output	Reserved for future use.
249	`FailsafeReturnTokenOut`	output	Reserved for future use.
248	`FailsafeHelixTokenIn`	input	Reserved for future use.
247	`FailsafeHelixTokenOut`	output	Reserved for future use.
246	`SufixTokenOut`	output	Output of token generator (see pad no. 267)
245-240a	n. c.		Removed

Table 18: Pads on the top side of Helix128-3.0. The first pad in the table corresponds to the uppermost pad of the chip's top side (with the frontside left).
Ref. no. Pin name Type Description

266,265 Gnda supply analog ground (0V)

264,263 Vssa supply negative analog supply voltage (-2V)

262,261 Vdda supply positive analog supply voltage (+2V)

260 TestOut output test channel preamplifier output

259c GndComp supply Reference voltage for comparators' AC coupling (0V)

259b VssComp supply Comparators' most negative supply (-2V)

259a VddComp supply Comparators' most positive supply (+2V)

259 n. c. n. c. Reserved for future use

258 notReturnTokenOut output Reserved for future use

257a ReturnTokenOut output to be connected to pad no. 180a ReturnTokenIn of predecessing Helix128-2.2/2.3 if the chip is nonleading in a daisy chain (not to be connected for single chip operation and if the chip is the first in a daisy chain)

257 SyncOut $\langle$ 0 $\rangle$ output synchronicity monitoring output to neighbouring Helix128-2.2./2.3

256 SyncOut $\langle$ 1 $\rangle$ output ``

255-253

252 SyncOut $\langle$ 5 $\rangle$ output ``

251 HelixTokenIn input to be connected to pad no. 187 HelixTokenOut of predecessing Helix128-2.2/2.3 if the chip is nonleading in a daisy chain (not to be connected for single chip operation and if the chip is the first in a daisy chain)

250 n. c. n. c. Reserved for future use

249 FailsafeReturnTokenOut output 1162To be connected to FailsafeReturnTokenIn of the tex2html_wrap_inline$2^nd$tex2html_wrap_inline previous chip.

248 FailsafeHelixTokenIn input 1166To be connected to FailsafeHelixTokenOut of the tex2html_wrap_inline$2^nd$tex2html_wrap_inline previous chip.

247 FailsafeHelixTokenOut output 1170To be connected to FailsafeHelixTokenIn of the tex2html_wrap_inline$2^nd$tex2html_wrap_inline previous chip.

246 n. c. n. c. Reserved for future use

245-240a n. c. Removed