FPL 2008
The 18th INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS
Heidelberg, Germany, September 8 - 10, 2008
http://fpl.org
Heidelberg, Germany, September 08-10
 

PROGRAM

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Monday, September 8, 2008
08:00REGISTRATION
08:30
OPENING
08:45
09:30BREAK
10:00


Encryption Applications Network on Chip 1
11:30BREAK & POSTER SESSION 1
12:00
KEYNOTE 2
12:45LUNCH
14:00PAPER SESSION 2


Analysis of Reconfigurability Image and Video Processing FPGA Architecture
15:30BREAK & POSTER SESSION 2
16:00


Dynamic Reconfiguration
Search and Matching Acceleration Reconfigurable ASIP Design
17:30BREAK
17:45PHD FORUM
18:15WINE RECEPTION
19:30CLOSE





Tuesday, September 9, 2008
08:00REGISTRATION
08:30
09:15BREAK
09:30


Novel Applications Reconfigurable Processors
11:00BREAK & POSTER SESSION 3
11:30
PAPER SESSION 5
 

Analysis of Reconfigurability II
Random Number Generation & PLL
Networks on Chip II
13:00LUNCH
14:00PAPER SESSION 6


Codesign
FPGA Application in
High Energy Physics
Reconfigurable Processor Arrays
15:00
TUTORIAL
15:30BREAK & POSTER SESSION EU
16:00


Tools for FPGA Design
High Performance Computing for Financial and Biological Modelling DFG Session
17:30BREAK & POSTER SESSION 4
18:00TRAM TO CASTLE
19:00GALA DINNER
22:00CLOSE





Wednesday, September 10, 2008
08:00REGISTRATION
08:30
09:15BREAK
09:30


Algorithm AccelerationIndustrial Presentations
11:00BREAK & POSTER SESSION 5
11:30
PAPER SESSION 9
 

Optimization
Surveys and Trends
Industrial Presentations
13:00CLOSING REMARKS
13:15CLOSE


Additional Industrial Workshops offered on Wednesday, Thursday and Friday.