03/16/2012 IDESA Microelectronics Training in Heidelberg

For the first time we are arranging an IDESA Microelectronics Training course in March 2013


04/07/2011 First testchip in TSMC 65nm submitted

The first TSMC 65nm testchip was submitted today and therefore we had a break in our seminar.


03/18/2011 Cadence: Installation protection and license statement

Cadence forces us to keep accurate records of all persons who have access to Cadence tools and licenses.


03/16/2011 ASIC seminar

Starting 2011, the ASIC laboratoy has its own Oberseminar:

"Circuits and methods for VLSI design: Weekly seminar of the Heidelberg ASIC-Laboratory"

Everybody interested in microelectronics is warmly welcomed to...


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Last update of this page: 2008-11-26_